DDR Engineer
Company: Apple Inc.
Location: cupertino
Posted on: May 3, 2021
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Job Description:
You will join the DDR PHY design team. We provide outstanding
PHY designs for high-performance, low power applications. As a
logic design engineer, you will be involved in all phases of the
design, from concept study, architecture definition, design and
verification, to silicon bring-up and characterization. Key Qualifications * - The ideal candidate will have demonstrated ability in logic
design with the following qualifications: * - RTL design using
Verilog or SystemVerilog, assertion writing * - Design of state
machines, data paths, arbitration and clock domain crossing logic *
- Logic synthesis, timing constraints * - Exposure to Design For
Test, understanding of scan concept and writing DFT friendly RTL *
- Unified Power Format for simulation, synthesis and electrical
rule checking Equivalence checking * - Prior experience in DDR PHY
design and mixed-signal environment is a plus Description In this role, you will be responsible for: Performing concept
studies and provide direction in terms of performance, gate count
and power for various digital designs. Writing detailed design
specification and test plans in close collaboration with
architecture, circuit designers and verification engineers.
Providing high-quality RTL description, including assertions, for
the design. Formal tools and static checkers will be used to
guarantee RTL quality. Supporting design verification to insure
bug-free first silicon. Driving functional and code coverage as
well as timing closure for your designs. Supporting silicon
bring-up, performance and power characterization. Education & Experience Bachelors or Masters Degree in Electrical Engineering or
Computer Science
Keywords: Apple Inc., Cupertino , DDR Engineer, Other , cupertino, California
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