SoC Physical Design Engineer, Electrical Analysis
Company: Apple Inc.
Posted on: May 3, 2021
Imagine what you could do here. At Apple, new ideas have a way
of becoming extraordinary products, services, and customer
experiences very quickly. Bring passion and dedication to your job
and there's no telling what you could accomplish. Dynamic, smart
people and inspiring, innovative technologies are the norm here.
The people who work here have reinvented entire industries with all
Apple Hardware products. The same passion for innovation that goes
into our products also applies to our practices strengthening our
commitment to leave the world better than we found it. Join us to
help deliver the next groundbreaking Apple product
As a Physical Electrical Analysis Engineer in our SOC team, you
will be driving the electrical analysis and verification of an
* You will have a background in electrical and computer
engineering with experience and ability to understand design and
architecture of high performance, low power designs, and digital
circuits. * You have strong knowledge of analysis flows and
methodology and have worked with all aspects of ASIC physical
design including floorplanning, clock and power distribution. *
You're familiar with package modeling techniques for chip level
power analysis. * You bring the scripting skills needed to debug
flow related issues and make enhancements as appropriate. * You
have good working knowledge of industry standard tools used for
analysis such as Apache Redhawk, Voltagestorm, ETS, PT-SI, etc.
In-depth knowledge in one or more of these tools will be
advantageous. * Past experience of signoff on successful chip
tapeouts will help you succeed in our team. * Your circuit design
background and hspice experience a plus.
As a member of our physical design team, you will be performing
various electrical analyses at the chip level, including but not
limited to, Static/Dynamic IR, EM, Noise and Signal EM. You will
work multi-functionally with the CAD/technology teams for flow
bring up and validation. You will also collaborate with the
implementation team during the entire chip design cycle to drive
signoff closure for tapeout. You'll manage schedules and support
multi-functional engineering effort.
Education & Experience
BSEE/MSEE is required
Keywords: Apple Inc., Cupertino , SoC Physical Design Engineer, Electrical Analysis, Other , cupertino, California
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