CPU Silicon Bringup Engineer

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product.

In this highly visible role, you will be at the center of a chip design effort working with many disciplines, with a critical impact on getting functional products to millions of customers quickly. You will be a member of a CPU silicon bringup team where your tasks will include reproducing silicon failures on FPGA or Emulators, optimizing FPGA models for speed, creating silicon irritators on FPGA and executing parts of functional silicon bringup plans.

Key Qualifications

* The ideal candidate should have good all-around hardware (logic as well as board) and low-level software skills * Strong understanding of processor architecture * Experience with FPGA design and optimization * Good understanding of firmware and device drivers * Good C and assembly programming skills * Excellent partnership and communication * Ability to work with multiple teams in delivering a solution

Description

In this highly visible and interactive role, your primary responsibilities will be: Reproduction of silicon failures on FPGA/Emulation FPGA model build and methodology for ECO verification Develop and deploy tests on silicon as part of bring up plan Contribute to design of hardware irritators on FPGA cards to validate features on silicon

Education & Experience

BS, MS, or Ph.D. in Electrical Engineering, Computer Science, or Computer Engineering is required.

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